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Transformer coupling is frequently desired in HART Masters to avoid connecting a process loop to ground. The transformer, itself, as well as the associated circuitry should be chosen carefully to meet HART specifications. An initial approach is often that of figure 1.

        1.    The capacitor that provides DC isolation temporarily short-circuits the network
                (process loop) when it's first connected. This "bumps" the process. A resistor
                can be inserted in series with the capacitor to reduce bumping. But to be
                effective, either the resistor has to be made too large or the capacitor too small.

2. The transformer must be physically quite large to present a sufficiently high
impedance during receive.

A way around both of these problems is to use an optically coupled switch at the network side of the transformer. A circuit using this approach is presented here. It uses a relatively small audio transformer and is virtually bump free.

Although recent updates of HART specs provide for a variety of situations, the original impedance and test waveform requirements to satisfy either a HART Primary Master or Secondary Master will be used. They are:

            Impedance During Transmit:
                    real part under 100 ohm, 500 Hz to 10 kHz.
                    imaginary part between -35 ohm and 35 ohm, 500 Hz to 10 kHz.

To insure good operation at worst-case load, the transmit waveform should not change drastically when the load consists of 250 ohm in parallel with 0.3 ufd.

A key feature of the circuit is that the device side of the transformer sees almost a short-circuit, whether transmitting or receiving. Consequently, the magnetizing inductance of the transformer becomes less important in determining circuit behavior. This permits a very small transformer. (T1 is 0.31 x 0.41 x 0.465 inch or 7.9 x 10.4 x 11.8 mm.) Since the circuit will normally be in receive mode when it's connected to the network, resistor R1 effectively limits bump current to a small value. The transformer is used in a 2:1 step-down ratio to reduce the amount of receive current that must be absorbed into the virtual ground of the receive opamp. D1 and D2 are used for transient protection.

The circuit is now analyzed to verify that it meets requirements. (It has also been tested and found to be HART conformant.) At frequencies of interest, the equivalent circuit is that of figure 3. The transformer values are measured values. The switch is open during receive and closed during transmit.

The receive impedance is set to at least 10 kohm by R1 and need not be examined in any detail. The receive transfer function is found by replacing the network components with a voltage source, Vin. R3 in series with R1 can be neglected. The network side components are then reflected to the device side, giving us the circuit of figure 4. C1 and R1 are replaced by C1' and R1', the reflected values. The received signal is a current, Iout, into the opamp virtual ground.

The other elements are included to show their effect at band edges and their effectiveness in reducing out-of-band interference (4-20 mA signaling). The magnitude of the full expression for Iout/Vin is plotted in figure 5 and is normalized to 20 kohm.

The response plot is relatively flat in the HART band. The HART midband gain magnitude is 0.987. This slight attenuation can be taken into account in subsequent stages. The response is down 20 dB at 10 Hz, so that it does provide interference rejection where it's most needed. (Analog 4-20 mA signaling exists primarily at DC to 10 Hz.) The peak near 40 Hz is troublesome but can probably be dealt with in the receive filter.

To aid in the rejection of received interference, a small capacitor (on the order of 0.1 ufd or 0.2 ufd) can be placed in series with R1 (figure 2 or figure 3) such that the switch is across this series RC combination. However, this prevents C1 from being charged to the network voltage and causes a single "bump" when the device first transmits. In instances where the device will be permanently connected, this may be acceptable.

An additional interference consideration is to make sure that there is nothing at the device side of the transformer that will saturate in the presence of the interference, which can be much larger than the largest signal.

The equivalent circuit for transmit is given in figure 6. R1 (of figure 3) is much smaller than R2 and is neglected. R2 and R3 have been combined into a single resistance, R23. The elements at the device side of the transformer have been reflected to the network side. The transmit signal voltage is Vt.

The real part of Z(s) is plotted in figure 7 as a solid line. The imaginary part of Z(s) is negative at lower frequencies and goes through zero at around 2.5 kHz. To show this on a log scale in figure 7, the absolute value is taken. The absolute value of the imaginary part of Z(s) is the dotted line in figure 7.

The transmit transfer function into the 1 kohm load is found next. For the 1000 ohm test load, C1 has a negligible impedance at all frequencies of interest and need not be included. Let Vout be the output voltage across test load RL. Then the transmit transfer function is

The transfer function magnitude is plotted in figure 8. This is normalized to 1/2 to remove the step-down factor of the transformer. It demonstrates that the transmit transfer function for the test load is flat in the region of interest.

The passband gain is 0.920. This is caused by the various small parasitic resistances present and can be corrected by increasing the transmitted signal amplitude. Variations in temperature will cause these small resistances to vary. However, the effect on output voltage is minor.

The effect of the worst-case load on the transmitted signal is examined by replacing RL in the above transfer function with the combined RL=250 ohm, CL=0.3 ufd in parallel. With this worst-case load C1 can no longer be neglected and is added back into the analysis. The result is figure 9.

The magnitude is still roughly flat in the region of interest and is 0.746 at HART midband.

The analyses so far have demonstrated that excellent low-frequency response can be achieved with a relatively small transformer. In fact, the low-frequency end appears to be better than needed which suggests that an even smaller transformer would be OK. Figure 10 is a repeat of figure 8 at different values of L1. L2 has also been adjusted in proportion to L1.

This shows that L1' = 20 mH may also provides adequate low-frequency response. A custom transformer of significantly smaller size may be possible.

When a trapezoidally shaped signal is used, the extra response at the low end is helpful. It reduces the tendency of the waveform to droop. SPICE simulations using L1' = 125 mH and L1' = 20 mH with trapezoidal waveforms (load is test load = 1 kohm) are illustrated in figure 11. The circuit simulated is that of figure 6.

The droop seen in figure 11 can often be equalized in the driver circuit. The transformer creates a transfer function that is approximately

The purpose of Rf is to provide a DC feedback path. Normally it is much larger than Rin. Then H(s) in the frequency range of interest is approximately

which is the desired form for the equalizer transfer function. Rf can't be made arbitrarily large because this circuit amplifies the opamp offset voltage by approximately Rf/Rin. Using values of R4' and L1' of figure 6, we see that the time constant, tau, is equal to 6 millisecond. Then suppose we choose Rin = 10.7k, Rf = 1Meg, and C = 0.56 ufd. Then, repeating the SPICE simulation with the equalizer added gives us the result of figure 13.

The lower trace of figure 13 (no equalizer) is just a repeat of the middle trace of figure 11. This shows that the equalizer has almost removed the droop entirely. This type of equalizer, which is done in the transmitter as opposed to the receiver, is also called pre-emphasis.

The worst-case load includes a 0.3 ufd capacitor. It is important to insure that this capacitance, reflected through the transformer, is not so large as to cause oscillation in the transmit driver. Generally, the parasitic resistances in the transformer and the switch will be large enough to prevent this. However, it is clearly not a good idea to try to make the switch and transformer "perfect."

1. A combination of optical and transformer coupling produce an isolated HART
device that meets all HART requirements and is virtually bump free.

        2.    By creating a low impedance across the device side of the transformer, the circuit
                behavior becomes almost independent of the transformer magnetizing inductance.
                This allows a small transformer.

        4.    Although an off-the-shelf transformer with relatively large inductance is used,
                it appears that a smaller inductance might still be satisfactory and that the
                transformer could be made even smaller.

        5.   If a trapezoidally-shaped transmit waveform is used, good low-frequency
                response is needed to reduce droop. An equalizer can be used to cancel the
                remaining droop.

6. A benefit of the transformer is its fundamental high-pass behavior. It helps
reject analog 4-20 mA signaling.

Some of the simpler HART modem chips, such as the Symbios 20C12 and Smar HT2012, can produce an undesired start-up transient in the transmit waveform. This is illustrated in figure 1 and is the result of AC coupling the output of a logic gate. The gate output is at either "0" or "1" for a long time prior to the carrier burst.

Consequently, when the carrier starts, the average voltage at the gate output shifts from either 0 or Vcc (Vcc = gate supply voltage) to Vcc/2. This amounts to applying a step function of magnitude Vcc/2 to the subsequent circuitry, resulting in an initial slowly varying shift of the carrier envelope shown in figure 1.

Since the two modem chips identified above use a CMOS logic output as the TXA (transmit) output, they can produce this effect if we aren't careful. Fortunately, however, the TXA output in both of these modem chips is a tri-state output, enabled by RTS (request-to-send). Prior to transmit the TXA pin is in tri-state (high impedance). When transmission begins, TXA comes out of tri-state and starts emitting the FSK as logic levels. The fact that tri-state behavior is built into the TXA output is a clue as to how to avoid the start-up transient.

From an analog viewpoint, the steady-state transmit signal at TXA is an AC voltage with amplitude Vcc/2 and centered around Vcc/2. If TXA starts out at some other voltage, say Vo, then there is effectively a step function from Vo to Vcc/2 applied at TXA at the start of transmit. The relaxation of the average voltage from Vo to Vcc/2 is the start-up transient. In the two modem chips identified above, if nothing is done to control Vo, it can wander around (depending on leakage paths) and be as small as 0 volt or as large as Vcc.

We can avoid the transient by forcing Vo = Vcc/2. Therefore, instead of letting the TXA output float, it should be held at Vcc/2. Two possible ways of doing this are illustrated in figure 2.

The difference can be significant. Figure 3 shows the "after" picture of the carrier burst.

Why not just let the start-up transient occur?

The start-up transient probably doesn't affect digital communication because it dies out during the preamble. The reason we try to remove it is that HART usually sits on an analog 4-20 mA signal, and looks like noise to the circuits that process the analog signal. It's best if we can keep this noise to a minimum. A clean start and stop of the carrier helps.

In HART Slave devices, the "transmit out" signal in figure 2 is usually AC-coupled into the summing junction of an opamp that forms the current source. In HART masters, however, there may be a semiconductor switch between "transmit out" and the network. The purpose of the switch is to prevent a low impedance from loading the network when the device is receiving. This switch and its associated circuitry can also cause a start-up transient. To avoid this it may be necessary to keep both sides of the switch at the same voltage prior to closing it.

Of course the easy way to avoid start-up transient is to use a more modern chip, such as the Symbios 20C15. This has built-in circuitry to effectively start out (and end up) at Vcc/2 without the need for any external circuitry.
The techniques described above may help if you can't use the 20C15.

Early HART modem chips were entirely digital to simplify their design. The FSK that they produce (and expect to receive) is a square wave, with FSK information contained in the timing of signal transitions. The square-wave version of FSK is identical to what we would get by applying conventional, sinusoidal FSK to a comparator with a reference of 0 volt. Square-wave FSK cannot be applied directly to the HART network. Nor can we expect to receive the signal in this form. Both the transmit and receive signals must be processed to some degree before they are acceptable. Transmit processing includes wave-shaping to control frequency content. Receive processing includes filtering to remove noise and interference, detecting carrier, and squaring or slicing the received waveform to convert it to the desired square-wave FSK. The Symbios Logic 20C15 HART modem chip has the wave-shaping and most of the receive processing built in. Other earlier chips, such as the HT-2012, don't. If you plan to use one of the earlier ones, you will need to add these functions.

The HART power spectrum exists mainly from about 950 Hz to 2500 Hz. It should be possible to convert the transmit wave to a sinusoidal shape by applying a bandpass filter to separate out only these frequencies. But the bandpass filter must eliminate frequencies that are as close as 4.6 kHz (3rd harmonic). This suggests a relatively high-order filter. And even a low-order filter, implemented in analog form, would distort the transmitted signal. Therefore, a bandpass filter is not likely to produce the desired result.

Another method is to apply the square wave to the up/down control of an up-down counter. The counter is clocked at a constant frequency that is quite a bit higher than the HART signaling frequencies. The counter is also designed to limit its count in either direction. That is, once the count reaches some low level, it won't go any lower. And once it reaches some high level, it won't go any higher. The counter effectively performs an integrate-and-clamp operation. If the counter output is applied to a D/A converter, the effect is to convert the square wave into a trapezoidal wave. A lowpass filter following the D/A converter will usually be necessary to reduce granularity.

An easier way to implement the integrate-and-clamp operation is illustrated in figure 1. This is an opamp integrator with transistors and diodes added to perform the clamping. Some suggested part numbers are included.

The clamp level is 3 diode drops and varies with temperature. For a wide operating temperature range, a thermistor might be needed (in a subsequent stage) to reduce amplitude variation. R2 should be large compared to R1, so that it doesn't interfere significantly with the integrator operation. It can't be increased without limit, however, because the opamp offset will be amplified by a factor 1+R2/R1. The rate of change of output voltage during the integration period depends on the square wave amplitude and the R1C product. For a square wave of 5 volt p-p, the R1 and C given in the figure yield a HART-compliant output wave.

For HART modem chips that are entirely digital, the receive processing that occurs ahead of the modem chip consists of filtering the received signal to remove interference and noise, and then applying the result to a comparator (also called a slicer) to convert it to digital form. The received signal is also applied to a second comparator with an offset to perform the carrier detect function. These receive functions are illustrated in figure 2.

The output of the first comparator is applied to a shift register and associated logic ("logic 1"). This digital circuitry effectively requires that the comparator output remain at one level or the other for some minimum number of clock cycles before the input ("receive signal") to the modem chip is allowed to change.

Instead of logic circuits following the receive data comparator, hysteresis has also been used to prevent short (noise) pulses from being generated at the comparator output and passed on to the demodulator. DC hysteresis is not advised, since it shifts (in time) the point at which a zero-crossing is detected. AC hysteresis should be done in such a way that transients die out within about half of the smallest expected time interval. This is 1/4 of a cycle of 2200 Hz or about 230 microsecond.

To detect carrier, the signal at the second comparator must have an amplitude larger than the offset voltage Voff. The offset, referred to the input, is 50 mV. The block labeled "Logic 2" is a crude filter whose purpose is to ignore short intervals of pulse activity from the carrier detect comparator when carrier is absent; and to ignore short intervals of pulse drop-out when carrier is present. The logic circuitry requires some number (about 2 or 3) of consecutive pulses from the Carrier-Detect comparator before it indicates Carrier Detect to the modem chip. Once Carrier Detect is asserted, the same logic circuitry following the comparator looks for some number (again, about 2 or 3) of consecutive missing pulses, to indicate that the Carrier is no longer present. Notice that the time between comparator pulses will vary due to the FSK. Since the received signal amplitude is effectively measured by the Carrier Detect comparator, some degree of gain accuracy ahead of the comparator is required and the comparator must have a low offset voltage.

The HART pass-band extends from about 950 Hz to 2500 Hz. A receive bandpass filter for HART is often created by cascading high-pass and low-pass filters and ignoring (initially) their interaction. Once this is done, the pass-band gain is usually a few percent below what it would be ideally for either filter alone. Gain may be applied elsewhere to make up for this, thereby maintaining the gain accuracy needed for carrier detect.

The low-pass section helps to remove high-frequency noise. HART Standards don't specify what it should be. Therefore, a single-pole is often used. To avoid significant effects in the HART passband, the corner frequency should be in the region of 10 kHz to 15 kHz.

The high-pass section of the receive filter is responsible for removing analog 4-20 mA signaling that normally coexists with HART. The original HART Standards specify that interference can be as high as 22 volt pp at 25 Hz and drop at a rate of -40 dB/decade at frequencies above 25 Hz; and that the HART signal can be as small as 0.13 volt pp. Or, in other words, the interference can be about 170 times the signal. Clearly, huge demands are placed on the high-pass filter if it is to extract the smallest possible signal superimposed on the largest possible interference.

In recent years, however, there has been some recognition that the signal and interference are both developed across the same resistor and will tend to track. When analyzed in these terms, the ratio of interference to signal is at most about 16. To keep errors at a minimum it is probably sufficient to reduce the interference to 0.2 of the HART signal. Then the attenuation at 25 Hz must be 80 times or 38 dB. Thus, one requirement for the low-frequency end of the receive filter is that the response be down 38 dB at 25 Hz from what it is in the HART pass-band. This implies that a high-pass filter should begin rolling off at 950 Hz and provide attenuation of 38 dB at 25 Hz, or about 24 dB/decade. It is known, however, that a conventional high-pass filter with, for example, a Butterworth characteristic; causes delay distortion in the received signal. This distortion can be reduced by beginning the roll-off at a lower frequency, such as 500 Hz. Then the filter slope requirement becomes 29.2 dB/decade. This is satisfied using 2 poles. If other coupling elements, such as a transformer (see earlier part of app note) are used, they become part of the receive filter and must be taken into account. The response of a filter consisting of a 2nd-order Butterworth Highpass at 500 Hz, followed by as 1-pole Lowpass at 15 kHz is illustrated in figure 3.

Remember that, if interference is allowed to cause saturation of any stage in the receive filter, then any superimposed HART signal is destroyed. The interference can be as large as 22 volt pp at 25 Hz, while active element stages may have supply rails as close together as 3 volt. This often necessitates a passive front end for the receive filter. The passive front end reduces the interference to a level that is acceptable to the active element stages. Then the active element stages wipe out the rest of it. Obviously, another way of going about it is to use a resistive divider and create a flat loss ahead of an active filter. But this may require that the signal be amplified following the filter.

In [HART Physical Layer Test Procedure, HCF Document HCF_TEST-2, August, 1995] the test for analog interference accounts for the fact that the interference will tend to track the signal. It uses 8 volt p-p at 25 Hz across 500 ohm as the interference. Actual communication between Master and Field Instrument is used, so that reception in both directions is tested. The filter described above attenuates by about 52 dB at 25 Hz, which means that the 8 volt p-p of interference is reduced to 20 mV p-p. The Field Instrument will develop an in-band signal of about 1 mA p-p x 500 ohm = 500 mV p-p. The signal produced by the Master will also be about 500 mV p-p. Therefore, following the bandpass filter described above, either receiver will have a signal that is about 25 times greater than the interference. This easily satisfies the above criterion that the interference be reduced to no more than about 0.2 times the signal. Thus, the filter described above should lead to a satisfactory conformance test.

The AD421, made by Analog Devices Inc., is a low-power 16-bit D/A converter intended to control the current output in analog process transmitters. Analog Devices Inc. has published an application note, AN-534, that shows how to connect the 20C15 modem to the AD421. The following diagram shows how to do this for the Smar HT-2012 modem.

HART uses the Bell-202 modulation method of FSK (frequency shift keying). It also uses the Bell-202 shift frequencies of 1200 Hz and 2200 Hz for a binary one and zero, respectively. This came about in the early days of HART, partly from a desire to be able to modify existing telecom modems for use as HART masters. HART and Bell-202 are different in terms of impedances and signal levels. This, and a desire for very low power consumption, led to the development of modem chips that are intended specifically for HART. Still, in some applications, a telecom modem is the desired equipment for generating and receiving HART. This is true, for example, when sending HART over the switched telephone network.

A European telecom standard that is closely related to Bell-202 is CCITT V.23. Since CCITT V.23 modems are sometimes more readily available than Bell-202, or are necessary for European applications, the question naturally arises as to whether V.23 can be substituted for Bell-202. The answer is generally yes.

The Bell-202 and CCITT V.23 modem standards are very similar. The difference is that V.23 uses FSK shift frequencies of 1300 Hz and 2100 Hz for binary one and zero. The carrier frequency is 1700 Hz for either Bell-202 or V.23. Thus, the V.23 shift frequencies are 100 Hz closer to the carrier.

The two concerns in mixing HART and V.23 are whether HART modems will correctly receive V.23 and whether V.23 modems will correctly receive HART. Since the V.23 band of frequencies is narrower than for HART, any existing HART channel should already have a sufficiently wide frequency response for either HART or V.23. The question is then whether the respective demodulators work correctly. The existing HART modems, such as the 20C12 and 20C15, are designed to accept a continuous range of frequencies. Internally, they have the equivalent of a frequency-to-voltage converter. The "voltage" produced is proportional to frequency across the whole range from 1200 Hz to 2200 Hz. A comparator with a trip point equivalent to 1700 Hz completes the demodulation. When confronted with V.23 shift frequencies of 1300 Hz and 2100 Hz, the output of the frequency-to-voltage converter isn't quite as large but is still more than enough to correctly demodulate. Other demodulators, designed to accept V.23, seem to work in similar fashion.

But enough of theorizing. We have tested a combination of V.23 and HART modems and found them to work together flawlessly. In some of these tests the modems were physically about 60 miles apart and connected together via the switched telephone network.

Setting up either a Bell-202 or V.23 telecom modem for HART can be a headache, because of different bit rates, several modes of operation, "reverse" channels, etc. Here are some settings that may prove helpful.

1. Set BIT RATE to 1200 bits/second.

2. Set LOOPBACK to disabled.

3. Set Line Configuration to 2- or 4-wire, depending upon your application.

4. Set SOFT CARRIER to disabled or minimum.

5. Set TURN-AROUND DELAY to disabled or minimum.

6. Set LOCAL COPY to disabled.

7. Set CLEAR-TO-SEND DELAY to disabled or minimum.

8. Set CARRIER DETECT TURN-ON TIMING to minimum.

9. Set CARRIER DETECT TURN-OFF TIMING to minimum.

10. Set CONSTANT CARRIER to disabled.

11. Set LINE IMPEDANCE to 600 ohm.

12. Set RECEIVER SQUELCH to enabled.

13. Set TRANSMIT LEVEL to 0 dBm (leased line) or -9 dBm (PSTN).

HART modem chips typically operate at a clock frequency of 460.8 kHz or a multiple of it and are supposed to be accurate to 1%. This can easily be achieved with "tuning fork" crystals operating at 460.8 kHz or 921.6 kHz; or a conventional crystal operating at 1.8432 MHz. A watch crystal at 32.768 kHz can also be used with a PLL. The 32.768 kHz, multiplied by 14, yields 458.75 kHz -- 0.4% below the desired 460.8 kHz. Ceramic resonators operating at 460 or 921 kHz are also commonly used.

If you use the same time base for both the modem and the UART, then 1% accuracy may not be good enough. The reason for this is the combination of receive data jitter and clock skew between transmitting and receiving devices.

Clock Skew

Unfortunately, UARTs tend to integrate the clock error. To see this, suppose that the clock is off by 1%. At the end of 11 bit times (HART character time), the time error is 11*(1/1200 sec)*(0.01) = 91.7 microsecond = 11% of 1 bit time. Now suppose that the transmit time base is at 99% of nominal and the receive time base in another device is at 101% of nominal. Data at the receiving UART will be skewed by roughly 21% of one bit time at the end of each 11-bit character. This is measured from the start bit transition to the center of the 11th bit.

Receive Data Jitter

The receive data (at RXD) contains jitter that is a function of the modem and input noise. It can be as large as 12% of a bit time. Therefore, the relative separation between any two bit boundaries can be in error by as much as 24%. At the receiving UART the start-bit transition and a later transition can be shifted in opposite directions for a total of 24%.

When the clock skew and jitter are added together, the result is 21% + 24% = 45% of one bit time. This represents the amount that a bit boundary could be shifted from its expected position. It means that the receiving UART may get a transition very close to what it considers to be mid-bit. UARTs that sample only at mid-bit will not be affected. However, there are UARTs that take multiple samples during each bit to try to improve on error performance. These UARTs may not be satisfactory, depending on how close the samples are to each other, and how samples are interpreted.

A typical UART sample rate is 16X the bit rate. This means that the time between samples is nominally 6.25% of one bit time. Assuming that one of the samples is exactly at the nominal mid-bit position, it is at the 50% position. A UART that uses the center 3 samples may sample at nominal positions of 43.75 %, 50%, and 56.25 %. If the bit boundary is in error by 45%, then one of these samples might be different than the other two. A UART that takes a majority vote of 3 samples is acceptable. But a UART that takes 3 samples and expects them to be identical may signal an error.

It helps to make sure that your own clock is accurate. If the clock in your device is perfect, and you communicate with a 1% device, then the clock skew is reduced to 11%. The receive data jitter remains at 24% and the total error is 35%. We are not aware of any UARTs that cannot accept this much of a shift.

To maximize speed, a field instrument will often be designed to begin its response message immediately after the master's command message. These message frames are close enough together that there may not be enough time for carrier detect to drop out. This brings out an important point regarding carrier detect: It sole purpose is to indicate the presence of carrier, so that receivers know that they have sufficient signal to work with. Carrier detect is not intended to reliably indicate the start or end of a particular message frame. Start of frame detection is a Data Link Layer function and must occur through examination of the frame content.

The UART can cause a possible problem at the end of a message (end of frame). Normally, it is necessary to wait until the last bit of the last character of the frame has been sent until carrier is turned off. The UART usually tells you it's empty, which is an indication that you should turn carrier off. However, UARTs differ in what they mean by empty. Some indicate empty at the time of the last shift clock -- that is, simultaneously with the stop bit being shifted out. But if carrier were to be turned off at that time, the modem would cease transmitting and the stop bit wouldn't be sent. Therefore, it is important to determine which kind of UART you have. If it behaves as described, then you should wait at least one bit time after the empty indication until you turn off carrier. Note that adding a 1 bit delay doesn't do any harm, even if it isn't needed.

The HART specification for the impedance of a "high impedance device" models the device as in figure 1 and recommends that the capacitance at the device terminals be less than 5000 pf and the resistance seen at the device terminals be greater than 100 kohm.

The impedance magnitude at the limits of 5000 pf and 100 kohm is plotted in figure 2. An impedance magnitude anywhere above this curve should satisfy the impedance requirement, regardless of whether the impedance actually consists of the Rs and Cs shown.

Figure 3 shows an actual device impedance (blue) plotted along with the low impedance limit. Practical circuits will usually have a |Z| of 100 megohm or more at low frequencies. As frequency increases, |Z| drops rapidly and eventually gets close to or coincides with the sloping part of the impedance limit. The reason for this is that the low-frequency behavior is being controlled by a current regulator, while the higher frequency behavior is the result of added (passive) capacitance.

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