Excel Generates Simplified Boyle Opamp Models
The Boyle [1] opamp model has been popular for SPICE simulations
for a long time. Many opamp vendors supply Boyle or Boyle-like models for their
devices. Occasionally, however, you may come across an opamp that doesn't have a
model. If so, you may be able to use one of the Excel [2] spreadsheets presented
here. You can download them by clicking here. Both
are contained in the .zip file "boyle.zip". The first spreadsheet,
"boyle.xls", is based on the the Boyle model and assumes BJT input transistors.
The second, "cboyle.xls", is based on [3] and assumes MOS input
transistors. The spreadsheets quickly calculate SPICE model parameters from data
sheet information.
The spreadsheets focus on frequency response and slew-rate behavior. They don't model output saturation, output current limiting, supply current, or offsets. You can always add these if you need them.
To use the spreadsheet "boyle.xls" you enter 6 parameters. These parameters can often be found on the data sheet. Or else estimates can be made. The parameters, followed by their location on the spreadsheet, are
Compensation Capacitor Value (A8) -- This will usually be in the range of about 1 pf to 100 pf and is often the only capacitor shown in the schematic of the opamp.
Slew Rate (B8) -- Usually specified. The model makes no distinction between positive slew rate and negative slew rate. If they're different then take the mean.
Unity-Gain Frequency (C8) -- Usually specified. This is the frequency at which the open-loop-gain goes through 1.
DC Gain (D8) -- Usually a typical value is given or plotted. It may be in dB or volt/millivolt.
Excess Phase (E8) -- This can usually be found from the plot of open-loop-gain versus frequency. At mid frequencies the phase is -90 degree, due to the compensation capacitor pole. As the frequency approaches the unity-gain-frequency, the phase decreases from -90 toward -180 degree. The excess phase is the amount below -90 degree at unity gain. Suppose the phase reaches -140 degree at unity gain. Then the excess phase is -90 - (-140) = 50 degree. Subtracting the excess phase from 90 degree gives the phase margin.
Bias Current (F8) -- Usually specified. This is the base current for either input transistor. Both transistors are assumed identical with identical collector currents and bias currents.
The spreadsheet is protected so that only the above 6 parameters can be changed. Trying to change any other part of the sheet causes an error message. If the chosen values for R2 and R02 need to be changed you can unprotect the sheet.
The program output (and spreadsheet location) consists of:
Collector Resistance Rc (A14)
Emitter Resistance Re (B14)
R2, the load resistance for Ga (C14)
R02, the load resistance for Gb (D14)
Transconductance Ga (E14)
Transconductance Gb (F14)
Collector-to-Collector Capacitance C (H14)
The transistor current gain, HFE (H8)
In addition the program will also generate an ASCII file called "opamp" that is a SPICE subcircuit netlist for the opamp. To generate this file, simply select the cell labeled "Update" (Cell A16). (If A16 is already the selected cell, move off of it and then back on.) The file will be placed in the same directory as the spreadsheet. An output resistance of 100 ohm is included in the netlist as "rout". You can change this to some other value if desired.
It generally doesn't matter whether the actual opamp has NPN or PNP input transistors. The various entered values should all be positive.
The "boyle.xls" spreadsheet is illustrated in figure 1 below.
Figure 1 -- Illustration of "boyle.xls"
The resulting netlist is the following:
.SUBCKT opamp 2 3 8 10 * Pin 2 is non-inverting input * Pin 3 is inverting input * Pin 8 is output * Pin 10 is negative rail iE 10 1 60u Q1 4 2 11 TRAN Q2 5 3 12 TRAN re1 11 1 9066.92529067471 re2 12 1 9066.92529067471 rc1 4 10 9947.19234527739 rc2 5 10 9947.19234527739 c45 4 5 11.5470053837925p ga 10 6 4 5 0.00010053088 r2 6 10 10000000 ccomp 6 7 40p gb 7 10 6 0 0.994719234527739 r710 7 10 100 rout 7 8 100 .model tran pnp (BF=666.666666666667) .ends opamp
The second spreadsheet is "cboyle.xls". This is used to find SPICE macromodel values for opamps with CMOS input transistors. Six parameters need to be entered. They can often be found on the data sheet. Or else estimates can be made. The parameters, followed by their location on the spreadsheet, are
Compensation Capacitor Value (A8) -- This will usually be in the range of about 1 pf to 100 pf and is often the only capacitor shown in the schematic of the opamp.
Slew Rate (B8) -- Usually specified. The model makes no distinction between positive slew rate and negative slew rate. If they're different then take the mean.
Unity-Gain Frequency (C8) -- Usually specified. This is the frequency at which the open-loop-gain goes through 1.
DC Gain (D8) -- Usually a typical value is given or plotted. It may be in dB or volt/millivolt.
Excess Phase (E8) -- This can usually be found from the plot of open-loop-gain versus frequency. At mid frequencies the phase is -90 degree, due to the compensation capacitor pole. As the frequency approaches the unity-gain-frequency, the phase decreases from -90 toward -180 degree. The excess phase is the amount below -90 degree at unity gain. Suppose the phase reaches -140 degree at unity gain. Then the excess phase is -90 - (-140) = 50 degree. Subtracting the excess phase from 90 degree gives the phase margin.
C2 (F8) -- This is an output capacitance that generally will not be specified. It is related to the second pole frequency in the open-loop response. In the model presented in [3] it is assumed that C2 can be determined from the shift in the second pole caused by the addition of a load capacitance, CL.
But, generally, the open loop gain for the opamp (and therefore the position of the second pole) already uses or assumes some CL. The best approach to finding C2, as well as the true value of the excess phase, would be to add a second CL and measure the open-loop-gain. C2 is given by
where f is the 2nd pole frequency with no added load capacitance, CL1 is the first added load capacitance, CL2 is the second added load capacitance, fL1 is the 2nd pole frequency with CL1 added, and fL2 is the 2nd pole frequency with CL2 added.
Therefore, with two known values of f2prime for the two values of CL, f2 can be found. Once f2 is found C2 can be found from either combination of f2prime and CL. The true excess phase, based on C2 alone, is found from
where f0 is the measured unity-gain frequency and f is the 2nd pole frequency.
You could also estimate C2. Using SPICE to generate the open loop gain, you can adjust C2 until you get close to the data sheet plot of open loop gain. If you use this approach, then be careful to add to the simulation model whatever load capacitance was used to generate the data sheet plot.
It is actually the product of R2 and C2 that determines the second pole frequency. Therefore, choosing or adjusting C2 will be affected by the choice of R2, the output resistance.
R2 (G8) -- This is the opamp output resistance. It is seldom specified, but you can estimate it. It will generally be greater than 500 ohm and less than 5000 ohm. The estimate should be such that the product R2*C2 is not greater than 1/(2*pi*second pole freq).
The spreadsheet is protected so that only the above 7 parameters can be changed. Trying to change any other part of the sheet causes an error message.
The program output (and spreadsheet location) consists of:
Drain Resistors, Rd (A14)
Transconductance Ga (B14)
Transconductance Gb (D14)
Combined Drain Currents, Iss (E14)
R1 (F14) -- Load for Ga
Transistor constant, Beta (G14) -- Same as SPICE parameter KP.
Fot (C14) -- This is an intermediate quantity that represents the true gain-bandwidth product at some frequency well below the unity-gain frequency. In other words, it is the unity-gain frequency that would be measured if there were not second pole in the open-loop response.
In addition the program will also generate an ASCII file called "copamp" that is a SPICE subcircuit netlist for the opamp. To generate this file, simply select the cell labeled "Update" (Cell A16). (If A16 is already the selected cell, move off of it and then back on.) The file will be placed in the same directory as the spreadsheet.
It generally doesn't matter whether the actual opamp has N-channel or P-channel input transistors. The various entered values should all be positive.
The "cboyle.xls" spreadsheet is illustrated in figure 2 below.
Figure 2 -- Illustration of "cboyle.xls"
The resulting netlist is the following:
.SUBCKT opamp 1 2 6 7 11 9 * Pin 1 is non-inverting input * Pin 2 is inverting input * Pin 6 is positive rail * Pin 7 is negative rail * Pin 11 is output * Pin 9 is ground m1 4 1 3 7 nm m2 5 2 3 7 nm .model nm nmos kp=1.84225306543914E-04 cin1 1 9 5p cin2 2 9 5p rd1 5 6 26115.0669574963 rd2 4 6 26115.0669574963 iss 3 7 7.95918180042873u ga 9 8 5 4 3.82920710725174E-05 r1 8 9 10845213618.7394 ccomp 8 10 10p e1 10 9 11 9 1 gb 9 11 8 9 7.58513974994209E-04 r2 9 11 1000 c2 9 11 25.6p .ends opamp
Notice that a small capacitance (5 pf) is also added from each transistor gate to ground. Current sources can also be placed at the transistor gates to model the diode reverse current that would be found at the inputs in an actual device.
References
1. Boyle, G.R., et. al., "Macromodeling of Integrated Circuit Operational Amplifiers," IEEE JSSC, SC-9, No. 6, December, 1974.
2. Microsoft Excel, Microsoft Corp., Redmond, WA.
3. Turchetti, C., and Masetti, G., "A Macromodel for Integrated All-MOS Operational Amplifiers," IEEE JSSC, SC-18, No. 4, August, 1983.
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